NCT7491
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60
Table 83. REGISTER 0x73 Configuration Register 2 (PowerOn Default = 0x00) (Note 34)
Bit
Name
R/W (Note 34)
Description
0
Reserved
R
1
Reserved
R
2
ABS/REL
R/W
0 = PECI uses relative values for fan control
1 = PECI uses absolute value for fan control
3
VAVG
R/W
VAVG = 1 indicates that averaging on the voltage measurements is turned off. This
allows measurements on each channel to be made much faster.
4
TAVG
R/W
TAVG = 1 indicates that averaging on the temperature measurements is turned off.
This allows measurements on each channel to be made much faster.
<6:5>
FQ
R/W
Sets the fault queue length:
<00> = 1 event
<01> = 2 events
<10> = 3 events
<11> = 4 events
7
Shutdown
R/W
34.This register becomes readonly when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register have no effect.
Table 84. REGISTER 0x74 Interrupt Mask Register 1 (PowerOn Default = 0x00)
Bit
Name
R/W
Description
0
2.5 V
R/W
2.5 V = 1, masks SMBALERT
for outoflimit conditions on the 2.5 V channel.
1
V
CCP
R/W
V
CCP
= 1 masks SMBALERT
for outoflimit conditions on the V
CCP
channel.
2
V
CC
R/W
V
CC
= 1 masks SMBALERT
for outoflimit conditions on the V
CC
channel.
3
5 V
R/W
5 V = 1 masks SMBALERT
for outoflimit conditions on the 5 V channel.
4
RIT
R/W
RIT = 1 masks SMBALERT
for outoflimit conditions on the Remote 1 Temperature channel.
5
LT
R/W
LT = 1 masks SMBALERT
for outoflimit conditions on the Local Temperature channel.
6
R2T
R/W
R2T = 1 masks SMBALERT
for outoflimit conditions on the Remote 2 Temperature channel.
7
R
Reserved
Table 85. REGISTER 0x75 Interrupt Mask Register 2 (PowerOn Default = 0x00)
Bit
Name
R/W
Description
0
12 V
R/W
12 V = 1, masks SMBALERT
for outoflimit conditions on the 12 V channel.
1
R
Reserved
2
FAN1
R/W
FAN1 = 1 masks SMBALERT
for a Fan 1 fault.
3
FAN2
R/W
FAN2 = 1 masks SMBALERT
for a Fan 2 fault.
4
FAN3
R/W
FAN3 = 1 masks SMBALERT
for a Fan 3 fault.
5
FAN4
R/W
FAN4 = 1 masks SMBALERT
for a Fan 4 fault.
6
D1
R/W
D1 = 1 masks SMBALERT
for a diode open or short on a Remote 1 channel.
7
D2
R/W
D2 = 1 masks SMBALERT
for a diode open or short on a Remote 2 channel.
Table 86. REGISTER 0x76 Extended Resolution Register 1 (Note 35) (PowerOn Default = 0x00)
Bit
Name
R/W
Description
<1:0>
2.5 V
R
2.5 V LSBs. Holds the 2 LSBs of the 10bit 2.5 V measurement.
<3:2>
V
CCP
R
V
CCP
LSBs. Holds the 2 LSBs of the 10bit V
CCP
measurement.
<5:4>
V
CC
R
V
CC
LSBs. Holds the 2 LSBs of the 10bit V
CC
measurement.
<7:6>
5 V
R
5 V LSBs. Holds the 2 LSBs of the 10bit 5 V measurement.
35.If this register is read, this register and the registers holding the MSB of each reading are frozen until read.